ELECTRA is a new generation of Shape-Based Autorouting software for PC boards.
In contrast with traditional gridded maze autorouters, a shape-based approach allows for more efficient use of routing area and is better suited to handle complex design rule requirements of high density SMD or through-hole boards, and achieve the highest route completion rates.
ELECTRA uses an effective multi-pass cost-based conflict reduction algorithm to find a routing solution, adapting to the natural flow of the nets. An adaptive routing algorithm is the only proven approach to reach high completion rate on today’s complex PCBs. ELECTRA provides immediate feedback on the routing progress and conflict reduction rate.
CAD System Plug-in
ELECTRA supports industry standard format by reading design file (SPECCTRA DSN). Routing results are saved into standard route file format (RTE) or session file (SES). ELECTRA is designed to plug into an existing PCB CAD system environment that supports DSN file format such as Altium, Pulsonix, CADInt, TargetPCB, DipTrace, SeeTrax, Eagle and other popular PCB CAD systems.
- Gridless routing of up to 256 layers
- Shape-based architecture
- Differential pairs autorouting
- Length matching autorouting
- Autorouting to target length
- Wiring and Clearance rule by layer, net intra-classes and inter-classes
- Via size and use_layer rule by net class
- Width and spacing rule by area
- Split/full power and ground plane support
- SMD escape fanout control
- Routes SMDs on both sides of the board
- Blind via and buried via support
- Support for embedded components
- Split Power/Ground Planes support
- AutoRouting by polygonal keep-in fences
- Memory routing pass
- Supports pre-defined fanout patterns
- Customization of cost factors
- Post-route cleanup optimization
- Real-time display of routing progress
- Shadow mode display on selection
- DRC Violation browser
- Preview DO file
- Batch routing option
- TCL Scriptable routing strategy (DO file)
Advanced Rules Support
ELECTRA is driven by DFM and high speed layout rules. Each interconnect object can have its own minimum clearance and wiring constraints. The autorouter combines the rules of all design objects based on their precedence in the hierarchy. Net classes and groups of connections can be constrained to route on specific layers (impedance control) and use different rules for each of the layers. Different via types can be assigned to each interconnect. These could be used for example for power and ground current-carrying requirements. The autorouter finds a solution that simultaneously respects all the user defined rules constraints.
Native multi platform support
The same code base is compiled on multiple platforms and architectures (x86 and x64).
Minimum System Requirements
- Windows 7 / 8 / 8.1 / 10; Linux Ubuntu 16.04; macOS 10.14.6
- 1 GHz Pentium III processor or equivalent
- 4 Gb RAM
- 10 MB hard disk space
- 1024×768 screen resolution or higher
- Preferably a 3-button wheel mouse